Various electro-optical display devices such as liquid-crystal display devices, EL (electroluminescent) display devices and others that comprise active matrix-type display circuits have been being much developed in recent years.
The active matrix-type display circuit comprises a plurality of TFT (thin film transistors) for each pixel, and its driving system is such that each TFT for each pixel therein is switched for displaying the intended image.
Recently, in addition, peripheral circuits-integrated, electro-optical display devices such as liquid-crystal display devices, EL (electroluminescent) display devices and others that comprise a plurality of TFT have been being much developed, in which active matrix-type display circuits and peripheral circuits of TFT are formed on one and the same substrate having an insulating surface. In those, each TFT comprises an active layer of crystalline silicon. The crystalline silicon is characterized by its crystal structure, and includes microcrystalline silicon, polycrystalline silicon, semi-amorphous silicon (this indicates a mixed condition of silicon composed of microcrystalline, polycrystalline and amorphous silicons), and single-crystal silicon.
Peripheral circuits-integrated, electro-optical display devices have the advantages of low production cost, high integration, small size and high function, as compared with conventional devices to be produced by mounting peripheral circuits on a substrate previously having active matrix-type display circuits thereon, through TAB connection or COG connection.
At present, as the peripheral circuits in those peripheral circuits-integrated, electro-optical display devices, essentially disposed are shift register circuits, decoder circuits, level-shifting circuit, etc. The quality of crystalline silicon films for those peripheral circuits has been much improved in recent years, and the peripheral circuits comprising such improved crystalline silicon films have extremely excellent properties of high-speed operation.
In the active matrix-type driver circuit, signals are supplied all at a time to each row or each column. In this, therefore, wiring patterns (scanning lines, signal lines) common to each TFT of each row or column are disposed, and these are connected with the source or the gate of TFT.
The size of the active matrix display circuit in an electro-optical display device reaches from a few inches to tens inches in terms of the diagonal width. In the device, therefore, the scanning lines and the signal lines through which signals are supplied to each pixel TFT have an extremely large length of from a few cm to tens cm, though having an extremely small width of from a few .mu.m to tens .mu.m, and such a large length of those lines is quite inconceivable in LSI and others comprising single-crystal silicon substrates.
Since the active matrix display circuits in electro-optical display devices comprise such thin and long wiring patterns, the gate electrodes therein which are not required to pass a large current therethrough in an electric field applied thereto (these are of wiring patterns for switching the gate of each TFT) will often produce serious problems of delay and attenuation of driving signals due to the electric resistance of the wiring patterns for them.
Accordingly, as the substance to constitute the gate electrodes in those circuits, used is a metal having a low electric resistance, such as aluminum, tantalum, molybdenum, tungsten, copper or the like so as to prevent the delay and attenuation of driving signals.
However, it is difficult to work metal lines into fine wiring patterns having a line width of not larger than 1 .mu.m or so.
For example, when aluminum is patterned according to a fine design rule to give fine wiring patterns having a width of not larger than 1 .mu.m or so, the morphology of large crystal grains of aluminum appears around the wiring patterns formed, since the crystal grains of aluminum have a large grain size of hundreds nm or more. Therefore, linear patterning of aluminum is often impossible.
In addition, wiring patterns of aluminum as formed according to such a fine design rule are often cut due to cracks of the crystal grains of aluminum, since the aluminum crystal grains are too large relative to the line width of the patterns formed. If so, the reliability of the wiring patterns is greatly lowered.
On the other hand, there are commercially-available LSI comprising single-crystal silicon substrates, which have fine wiring patterns as formed according to the established design rule for 0.35 .mu.m wiring patterns, and have an increased degree of integration.
In LSI comprising single-crystal silicon substrates, the gate electrodes are formed from a material of conductive crystalline silicon (or silicide), to which is added an impurity such as phosphorus or the like for the purpose of making the gate electrode have monoconductivity. The gate electrodes of such crystalline silicon may be patterned into fine patterns having a width of not larger than 1 .mu.m, for example, 0.1 .mu.m or so, though their electric resistance is higher by 10 times or more than that of metal electrodes.
The gate electrodes are for switching the gates ON in an electric field applied thereto. Therefore, they are not required to have low electric resistance, as compared with the wiring patterns to be connected with sources and drains for passing an electric current therethrough. For these reasons, in LSI-class integrated circuits comprising single-crystal silicon substrates and having short wiring patterns formed thereon, the gate electrodes may be formed from a material of crystalline silicon (or silicide).
The gate electrodes of crystalline silicon may be thinned, and transistors comprising such thin gate electrodes can be small-sized. Using such small-sized transistors realizes large-scale integrated circuits.
In addition, since the width of the gate electrodes can be narrowed, the driving voltage (source/drain voltage) of TFT can be lowered. As a result, the power to be consumed by TFT is reduced.
However, if crystalline silicon is used to form the gate electrodes in active matrix display circuits for large-sized displays, it causes the delay and attenuation of signals, since its electric conductivity is low but its electric resistance is high. If so, good displays could not be obtained.
For these reasons, in the conventional, peripheral circuits-integrated, electro-optical display devices, the gate electrodes are made of a metal not only in the active matrix display circuits but also in the peripheral circuits. Above all, widely used is aluminum or a material consisting essentially of aluminum for forming the gate electrodes, because of their high electric conductivity, excellent workability and stain resistance.
Therefore, in the conventional peripheral circuits-integrated, electro-optical display devices, only peripheral circuits that are relatively simple and have a low degree of integration, such as shift registers, decoders and the like, are formed on one and the same substrate on which are formed the active matrix display circuits, but the other peripheral circuits are attached to the substrate in an additional working process.
Needless-to-say, more complicated peripheral circuits composed of a large number of elements could be constructed, even when a metal is used for forming the gate electrodes therein. In that case, however, the area of the peripheral circuits on the substrate shall be enlarged, since the metal gate electrodes have a large line width of a few .mu.m or more. If so, the devices shall be large-sized, and the power to be consumed by the devices increases.
In peripheral circuits-integrated, electro-optical display devices, the gate electrodes of TFT constituting the active matrix display circuits are required to have low electric resistance while those constituting the peripheral circuits are required to be in fine patterns.
However, known is no substance for such gate electrodes capable of satisfying the both requirements. For all that, if the gate electrodes are so differentiated in a simple manner that those of TFT constituting the active matrix display circuits are made of a metal while those of TFT constituting the peripheral circuits are made of crystalline silicon, such results in a great increase in the number of working steps for separately forming the two types of such gate electrodes, while causing the increase in the production costs. As a result, the advantage of forming peripheral circuits-integrated devices will be lost.
In addition, the present applicant has found that, when the gate electrodes are so differentiated as above, there occurs another problem that the properties of TFT elements comprising the thus-differentiated gate electrodes are worsened. Precisely, in the TFT elements comprising them, the threshold voltage fluctuates, the S value is lowered, and the degree of mobility is lowered, and, in addition, the reliability of the TFT elements themselves is lowered.
This problem is remarkable especially in top-gate-type TFT.
FIG. 4(A) to FIG. 4(C) show a general process for forming crystalline silicon gate electrodes and metal gate electrodes. In those, the left-handed part indicates a TFT having crystalline silicon gate electrodes, and the right-handed part indicates a TFT having a metal gate electrode.
Where crystalline silicon gate electrodes and metal gate electrodes are separately formed on one and the same substrate, the former shall be formed first. This is because crystalline silicon gate electrodes must be formed at higher temperatures than metal ones, and have higher heat resistance than the latter.
As in FIG. 4(A), an underlying film 402 is formed on a substrate 401; active layers 403 and 404 of silicon are formed on the subbing film 402; and an insulating film 405 of silicon oxide or the like, which is to be a gate-insulating film, is formed on the active layers 403 and 404. A crystalline silicon film 406, which is to be patterned into gate electrodes, is formed on the insulating film 405 through LPCVD.
Next, the crystalline silicon film 406 is patterned into crystalline silicon gate electrodes 407 for two TFT.
In this step, in the part in which metal gate electrodes are to be formed, the crystalline silicon film on the insulating film for the active layer 404 is entirely etched away.
The etching may be effected by any mode of dry etching or wet etching. Anyhow, however, the upper surface 408 of the insulating film 405, which is to be a gate-insulating film, is much roughened in the etching step.
In particular, in dry etching which is generally employed in the art, the insulating film is electrically charged by the plasma for etching, and trap levels would be formed. In addition, even the surface of the active layer 404 of silicon that underlies the insulating film 405 will often be roughened.
As a result, when a metal gate electrode 409 is formed in a later step, on the insulating film 405 that acts as a gate-insulating film, the interfacial characteristics between the gate-insulating film and the gate electrode will be poor, resulting in that the properties of TFT thus formed are also poor. Precisely, in the TFT formed, the threshold voltage fluctuates, the S value is lowered, and the degree of mobility is lowered. As the case may be, the TFT formed will have latent negative factors of such poor properties, while expressing them with the lapse of time. In that case, the TFT could not have long-lasting reliability.